Research Information System
Journal of Electrical Engineering and Technology, 2025 (SCI-Expanded)
In multilevel inverters, the number of levels can be increased by diversifying the input source voltages in topologies that cannot be extended. In this article, a switched rectifier (SR) with 1 switch was added to a PUC circuit with 8 switches and producing a maximum of 13 levels, increasing the output level to 19 levels. This topology, developed using a single DC source, produces more than one DC voltage level from the input DC source using SR and normal rectifiers with the help of high frequency link. In the PUC circuit, which normally cannot reach high levels, it was possible to increase the number of levels and successfully synthesize the intermediate levels that cannot be synthesized thanks to the SR module. The idea of the proposed topology, which can produce outputs with different amplitudes and frequencies, was verified both in simulation and experimentally using the Genesys-2 FPGA development board. The proposed topology provides high power quality with 4.4% THD by supporting the fundamental frequency control method without ant filter. It is observed that an efficiency of over 96% is achieved in the MLI loss analysis. In high power applications, the SR-PUC MLI structure’s efficiency and harmonic performance make it a reliable and cost-effective option.