Design of a 21-level multilevel inverter with minimum number of devices count

Karakılıç M., Hataş H., Nuri Almalı M.

International Journal of Circuit Theory and Applications, vol.51, no.12, pp.5705-5723, 2023 (SCI-Expanded) identifier

  • Publication Type: Article / Article
  • Volume: 51 Issue: 12
  • Publication Date: 2023
  • Doi Number: 10.1002/cta.3730
  • Journal Name: International Journal of Circuit Theory and Applications
  • Journal Indexes: Science Citation Index Expanded (SCI-EXPANDED), Scopus, Academic Search Premier, Aerospace Database, Applied Science & Technology Source, Communication Abstracts, Compendex, INSPEC, Metadex, zbMATH, Civil Engineering Abstracts
  • Page Numbers: pp.5705-5723
  • Keywords: FPGA implementation, multilevel inverter, nearest level control, reduced switch count
  • Van Yüzüncü Yıl University Affiliated: Yes


Multilevel inverters (MLIs) have attracted the attention of researchers for their needs in industrial applications, renewable energy systems, and electric vehicles. MLIs require a large number of power electronic components to synthesize higher levels at the output voltage. However, overuse of power electronic devices increases the complexity, losses, and cost of MLIs. In this study, a new MLI has been proposed with a reduced number of power switches. The basic unit of the proposed MLI comprises only three independent DC sources and 10 switches (eight unidirectional and two bidirectional) to produce 21 levels at the output voltage waveform. The nearest level control (NLC) modulation method has been used to produce gate pulses. Furthermore, three extension topologies have been proposed to generate a higher number of levels, and the extension parameters have been compared with recently introduced and conventional topologies. The comparative study shows that the proposed MLI topology requires fewer components in terms of power electronics parameters than the others. On the other hand, the presented first extension study that can be used for all non-extendable basic units is one of the prominent values of the study. Simulation studies showing modulation methods, switching patterns, and signal outputs were performed with Matlab/Simulink. A prototype of the proposed main module has been realized and tested in the laboratory with an FPGA processing board. Experimental results have been verified with simulation results, and the performance of the proposed topology has been proven.